Diagnostic circuit for testing a circuit

ABSTRACT

A diagnostic circuit is configured for connecting to a unit under test that has a load and a sinusoidal source. The diagnostic circuit includes a voltage sensing device that has an input for sensing a signal, a first terminal for connecting to the load, a second terminal for connecting to the sinusoidal source, and a relay connected between the first and second terminals for connecting the sinusoidal source to the load. Clamping diodes are provide for clamping a sinusoidal signal and include a first clamping diode connected between a D/C voltage source and the input and a second clamping diode connected between ground and the input. A resistor is connected between the D/C voltage source and the first terminal. The diagnostic circuit verifies the operational functionality of the load, related wiring and connections.

CROSS-REFERENCE TO RELATED APPLICATION

This is a divisional application of application Ser. No. 13/166,299,filed Jun. 22, 2011, which in turn is a divisional application ofapplication Ser. No. 12/039,209, filed Feb. 18, 2008, now U.S. Pat. No.8,013,615, registered on Sep. 6, 2011, the prior applications areherewith incorporated by reference in their entireties.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a diagnostic circuit and more specifically to adiagnostic circuit for trouble shooting electronic control units ofappliances.

2. Description of the Related Art

Current sensing diagnostic circuits are often used in appliances (e.g.refrigerators) to monitor the operation of electrical components suchas, for example, control units of the appliance. During testing, acurrent should flow when a controlled relay is commanded to close, and asensor detects that current and reports that the electrical componentbeing tested is operating as intended. If, however, current does notflow through the diagnostic circuit when the relay is commanded toclose, the sensor notes the absence of that current and reports to acontroller (e.g. microprocessor) that the electrical component is notfunctioning properly. When the electrical component is not working,malfunctioning, and the like, a technician is often summoned to repairand/or replace the electrical component in the appliance. Unfortunately,an indication of a failure of the electrical component to functionproperly can occur when a variety of different faults (e.g. an openload, a disconnected wire, and the like) are experienced and/or theelectrical component itself is damaged. Therefore, the technician willhave to check a number of different potential problems to determinewhich electrical component has actually failed, which electricalcomponent needs to be replaced, which leads or connections to check, andthe like.

Often a current transformer is used in the diagnostic circuit forsupplying the current. However, the dynamic range of currents in modernappliances is 10 mA to 25 A. Such a wide range of currents is difficultto produce using a current transformer and requires multiple currenttransformers leading to a complex diagnostic circuit. In addition,current sensing cannot differentiate between an open load and adefective load.

It is a well-known problem that service technicians have a tendency toautomatically replace electronic control units when repairing anappliance. Unfortunately, most of the replaced electronic control unitsare not defective. There is a need to provide a simple, low costdiagnostic circuit that proves that the control unit is functioningproperly and that problems are most likely not related to the electroniccontrol unit.

BRIEF SUMMARY OF THE INVENTION

It is accordingly an object of the invention to provide a diagnosticcircuit for testing a circuit that overcomes the above-mentioneddisadvantages of the prior art device of this general type, whichprovides an inexpensive yet effective diagnostic test device for testingcontrol units.

With the foregoing and other objects in view there is provided, inaccordance with the invention, a diagnostic circuit for connecting to aunit under test that has a load and a sinusoidal source. The diagnosticcircuit includes a voltage sensing device with an input for sensing asignal, a first terminal for connecting to the load, a second terminalfor connecting to the sinusoidal source, and a relay connected betweenthe first and second terminals for connecting the sinusoidal source tothe load. Clamping diodes are provided and include a first clampingdiode connected between a D/C voltage source and the input and a secondclamping diode connected between the ground and the input. A resistor isconnected between the D/C voltage source and the first terminal.

In accordance with an added feature of the invention, a capacitor isconnected between the input and ground for filtering the signals. Atleast one further resistor is connected between the input and the firstterminal for limiting a current sensed at the input.

In accordance with another feature of the invention, the voltage sensingdevice is a micro-controlled analog-to-digital converter circuit.

With the foregoing and other objects in view there is further provided,in accordance with the invention, a diagnostic circuit for connecting toa unit under test having a load and two lines of a sinusoidal source.The diagnostic circuit includes a voltage sensing device having a firstinput and a second input, terminals including first terminals forconnecting to the load and second terminals for connecting to the twolines of the sinusoidal source, relays each connected between one of thesecond terminals and one of the first terminals for connecting thesinusoidal source to the load, and a first diode pair having a firstclamping diode connected between a D/C voltage source and the firstinput and a second clamping diode connected between ground and the firstinput. A second diode pair is provided and has a first clamping diodeconnected between the D/C voltage source and the second input and asecond clamping diode connected between ground and the second input.

In accordance with an additional feature the invention, a firstcapacitor is connected between the first input and ground, and a secondcapacitor is connected between the second input and ground. Ideally, atleast one first resistor is connected between the first input and afirst one of the first terminals for limiting a current sensed at thefirst input. Furthermore, at least one second resistor is connectedbetween the second input and a second one of the first terminals forlimiting a current sensed at the second input. A first pull-downresistor is connected between the first input and ground, and a secondpull-down resistor is connected between the second input and ground.

With the foregoing and other objects in view there is further provided,in accordance with the invention, a diagnostic circuit for connecting toa unit under test having a load and a sinusoidal source. The diagnosticcircuit includes a voltage sensing device having an input for sensing asignal, terminals including first terminals for connecting to the loadand a second terminal for connecting to the sinusoidal source, a relayconnected between one of the first terminals and the second terminal forconnecting the sinusoidal source to the load, and clamping diodesincluding a first clamping diode connected between a D/C voltage sourceand the input and a second clamping diode connected between ground andthe input. In this embodiment, a first capacitor is connected betweenground and a first one of the first terminals, and a second capacitor isconnected between the clamping diodes and a second one of the firstterminals.

In accordance with a further feature of the invention, at least oneresistor is connected between the input and one of the first and secondcapacitors.

With the foregoing and other objects in view there is additionallyprovided, in accordance with the invention, a diagnostic circuit forconnecting to a unit under test having a load and a sinusoidal source.The diagnostic circuit contains a voltage sensing device having a firstinput for sensing a signal and a second input, terminals including afirst terminal for connecting to the load and a second terminal forconnecting to the sinusoidal source, a relay connected between the firstterminal and the second terminal for connecting the sinusoidal source tothe load, and clamping diodes including a first clamping diode connectedbetween a D/C voltage source and the input and a second clamping diodeconnected between ground and the input. A first capacitor is connectedbetween the first terminal and the first input and a second capacitorconnected between the second terminal and the second input.

In accordance with another added feature of the invention, at least oneresistor is connected between the first input and the first capacitor.

With the foregoing and other objects in view there is additionallyprovided, in accordance with the invention, a diagnostic circuit forconnecting to a unit under test having a load and three lines of asinusoidal source. The diagnostic circuit contains a voltage sensingdevice having a first input and a second input, terminals includingfirst terminals for connecting to the load and second terminals forconnecting to two lines of the sinusoidal source, relays each connectedbetween one of the second terminals and one of the first terminals forconnecting the sinusoidal source to the load, a first diode pair havinga first clamping diode connected between a D/C voltage source and thefirst input and a second clamping diode connected between ground and thefirst input, and a second diode pair having a first clamping diodeconnected between the D/C voltage source and the second input and asecond clamping diode connected between ground and the second input. Afirst capacitor is connected between a first of the first terminals andthe first input; and a second capacitor is connected between a second ofthe first terminals and the second input.

In accordance with a further feature of the invention, a third capacitoris connected between a third line of the sinusoidal source and theground.

In accordance with another feature of the invention, at least oneresistor is connected between the first input and the first capacitor.Preferably, at least one resistor is connected between the second inputand the second capacitor.

With the foregoing and other objects in view there is additionallyprovided, in accordance with the invention, a method for testing acircuit. The method includes the steps of connecting a diagnostic testcircuit to a load terminal of the circuit and to a line of a sinusoidalsource of the circuit; maintaining a relay connected between the loadterminal and the line in an open position; sensing a first voltagesignal at a sensing node coupled to the load terminal; deriving anoperational condition of the circuit in dependence on the first voltagesignal sensed.

In accordance with an added mode of the invention, there are the furthersteps of switching the relay to a closed position for connecting theload to the sinusoidal source; sensing a second voltage signal at thesensing node; and deriving the operational condition of the circuit independence on the second voltage signal sensed. The circuit isconsidered to be error free if the first voltage signal is less than 4 VD/C and that the second voltage signal is an oscillating signal. Thecircuit is considered to be defective if the first voltage signal isgreater than 4.5 V D/C or no oscillating signal is detected.

With the foregoing and other objects in view there is provided, inaccordance with the invention, a method for testing a circuit. Themethod includes the steps of connecting a diagnostic tester to a loadterminal of the circuit and to two lines of a multi-phase sinusoidalsource of the circuit; maintaining a first relay, of the diagnostictester, connected between a first load terminal and a first line in anopen position; maintaining a second relay, of the diagnostic tester,connected between a second load terminal and a second line in an openposition; sensing a first voltage signal at a first sensing node coupledto the first load terminal; sensing a second voltage signal at a secondsensing node coupled to the second load terminal; and deriving anoperational condition of the circuit in dependence on the first andsecond voltage signals sensed.

In accordance with an added mode of the invention, there are the furthersteps of switching the first relay to a closed position for connectingthe load to a first line of the multiphase sinusoidal source; sensing athird voltage signal at the first sensing node; sensing a fourth voltagesignal at the second sensing node; and deriving the operationalcondition of the circuit in dependence on the third and fourth voltagesignals sensed.

In accordance with a further mode of the invention, there are thefurther steps of switching the first relay to an opened position;switching the second relay to a closed position for connecting the loadto a second line of the multiphase sinusoidal source; sensing a fifthvoltage signal at the first sensing node; sensing a sixth voltage signalat the second sensing node; and deriving the operational condition ofthe circuit in dependence on the fifth and sixth voltage signals sensed.

In accordance with another added mode of the invention, there are thefurther steps of switching the first relay to a closed position;maintaining the second relay at the closed position; sensing a seventhvoltage signal at the first sensing node; sensing an eighth voltagesignal at the second sensing node; and deriving the operationalcondition of the circuit in dependence on the seventh and eighth voltagesignals sensed.

The circuit is considered error free if the first and second voltagesignals are logic low. The circuit is considered error free if the thirdand fourth voltage signals are oscillating signals having the samephase. The circuit is considered error free if the fifth and sixthvoltage signals are oscillating signals having the same phase. Thecircuit is considered error free if the seventh and eighth voltagesignals are oscillating signals having different phases.

Other features which are considered as characteristic for the inventionare set forth in the appended claims.

Although the invention is illustrated and described herein as embodiedin a diagnostic circuit for testing a circuit, it is nevertheless notintended to be limited to the details shown, since various modificationsand structural changes may be made therein without departing from thespirit of the invention and within the scope and range of equivalents ofthe claims.

The construction of the invention, however, together with additionalobjects and advantages thereof will be best understood from thefollowing description of the specific embodiment when read in connectionwith the accompanying drawings.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

FIG. 1 is a block diagram of a basic circuit;

FIG. 2 is a schematic diagram for explaining basic testing techniques;

FIG. 3 is a schematic diagram of a first embodiment of a diagnosticcircuit according to the invention;

FIG. 4 is a schematic diagram of a second embodiment of the diagnosticcircuit according to the invention;

FIGS. 5-8 are schematic diagrams of a third embodiment of the diagnosticcircuit according to the invention;

FIG. 9 is a schematic diagram of a fourth embodiment of the diagnosticcircuit according to the invention;

FIG. 10 is a schematic diagram of a fifth embodiment of the diagnosticcircuit according to the invention; and

FIG. 11 is a schematic diagram of a sixth embodiment of the diagnosticcircuit according to the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION

Referring now to the figures of the drawing in detail and first,particularly, to FIG. 1 thereof, there is shown a basic circuit whichshows a connection from logic ground of a micro-controlled A/D deviceMICRO to neutral N of a mains power supply. An operational equivalentschematic circuit with the addition of a relay RELAY is shown in FIG. 2for testing a proper connection to a load LOAD with the return toneutral N traversing through the D/C circuit ground. With the relayRELAY open a simple voltage divider network is formed with the voltagebeing read at an input IN of the A/D device being a voltage sensingdevice. Table I shows the expected voltage readings in dependence on theohmic resistance of the load.

TABLE I Load Voltage at Input IN  1k ohm 0.05 volts  10k ohm 0.45 volts100k ohm  2.5 volts Open   5 volts

Based on the voltages observed one can make conclusions about theoperational functionality of the load such as a control device of anappliance.

FIG. 3 shows a first embodiment of a diagnostic circuit according to theinvention following the basic concepts taught in FIGS. 1 and 2 that isideally suited for lower current loads typically energized by 120 V A/C.In FIG. 3, a filter capacitor C1 is provided for filtering noise.Clamping diodes D1 and D2 are provided for clamping A/C voltages andturning A/C sinusoidal signals into a square wave clamped between 0 and5 volts. Voltage and current limiting resistors R1, R2, R3 protect thecircuit from high currents. Resistors R4 and R5 are provided for currentlimiting and redundancy. Resistor R6 is also provided for currentlimiting. The load LOAD represents a control unit of an appliance or theunit under test. Three connection points A, B and C are shown, twoconnection points A and B are for connecting the diagnostic circuit tothe appliance, specifically an A/C source line L1 and the load LOAD. Aninternal connection C is the connection to A/C neutral N. The diagnosticcircuit measures all readings at the input IN for determining testresults. The following table now defines the operation of the diagnostictest circuit when it is hooked up for eight different diagnosticresults. In Table II it is assumed that the load LOAD is less than 300 Kohms. Of course it goes without saying that the value of the resistorsshown in FIG. 3 is dependent of the value of the load LOAD.

TABLE II Point A Point B Point C Relay Reading at IN Comment 1.Connected Connected Connected Open V_(A/D) < 4 V No errors detected 2.Connected Connected Connected Closed 60 Hz square No errors wavedetected (in phase with L1) 3. Connected Connected Connected Error - 60Hz square Error detected Stuck wave in relay closed (in phase withoperation. (s/b L1) open) 4. Disconnected Connected Connected OpenV_(A/D) < 4.0 V Error in line undetected 5. Disconnected ConnectedConnected Closed V_(A/D) > 4.5 V Error detected at relay or line L1dependant on configuration. 6. Connected Disconnected Connected OpenV_(A/D) > 4.5 V Error detected, no load or wiring open. 7. ConnectedConnected Disconnected Open V_(A/D) > 4.5 V Error detected, no load orwiring open 8. Connected Connected Disconnected Closed 60 Hz squareError not wave detected (in phase with L1)

Rows 1 and 2 show conditions in which everything is working properly andno errors are detected. Row 3 shows the condition in which the relayRELAY of the diagnostic test circuit is detected as faulty (e.g. stuckclosed). Row 4 shows the condition where the line L1 is faulty (open)but it is not diagnosed until the conditions in row 5 are performed. Inrow 5 a 60 Hz square wave was anticipated but a D/C voltage level isdetected. Row 6 shows the conditions from determining a load failure oran internal connection to neutral N failure because a 60 Hz square wavewas expected but only a D/C voltage reading was measured. In row 7 theerror is not detected.

For controlling more than one load, the circuit in FIG. 3 can berepeated for each additional load.

FIG. 4 shows a second embodiment of the diagnostic circuit in whichloads LOAD 1 and LOAD 2 can be multiplexed and in which only onemicro-controlled A/D device MICRO is needed. In addition, for simplicityFIG. 4 omits protective devices such as current and/or voltage limitingresistors and capacitive filters. In FIG. 4, two pull-up resistors R10,R12 are connected between a respective load LOAD 1, LOAD 2 and a 5 voltssource. Between each load LOAD 1, LOAD 2 and the one micro-controlledA/D device MICRO is a resistor R11, R13, respectively. Table III showsthe expected voltage results to be seen at the input IN.

TABLE III Load Connection Voltage Seen at IN Load 1 connected 2.1 voltsLoad 2 connected Load 1 Open 2.5 volts Load 2 Connected Load 1 Connected1.67 volts  Load 2 Open Load 1 Open   5 volts Load 2 Open

From Table III it is easy to ascertain voltage ranges to determine passand fail criteria for the loads. For example, a voltage greater than 4.5volts indicates that both loads failed, a voltage in the range of 1.9 to2.3 volts indicates that both loads passed, a voltage below 1.9 voltsindicates that LOAD 2 failed, and a voltage in the range of 2.3 to 3.0volts indicates that LOAD 1 failed. Of course the ranges are loaddependent.

FIG. 5 shows a third embodiment of a simplified diagnostic circuitsuited for higher current loads typically energized by 240 V A/C such asheater loads. The test circuit of FIG. 5 is ideally suited for sensinghigh current, lower ohm loads connected to a 240 V A/C source. In FIG.5, the diagnostic circuit has connection points E, F, G and H forconnecting to the load LOAD and to the A/C lines L1 and L2 of theappliance under test. Two relays RELAY 2 and RELAY 3 connect the A/Clines L1 and L2 to the load LOAD. Two pull down resistors R20 and R21connect the load to ground. As in FIG. 1, the power connections areconfigured such that D/C ground equals or is connected to A/C neutral N(e.g. a common ground). The micro-controlled A/D device in this instancehas two inputs IN1 and IN2. The pull down resistors R20 and R21connected to the inputs IN1 and IN2 ensure a low reading with noconnections. It is further noted that a digital input can be used inplace of the A/D inputs. In FIG. 5 it is assumed that the load LOAD isbetween 15-20 ohms meaning that the current is in the 10-16 amp rangefor 240 V A/C.

The diagnostic circuit shown in FIG. 6 is based on FIG. 5 but hasincorporated protection circuitry, filtering circuitry and clampingcircuitry. More specifically filtering capacitors C2 and C3, currentlimiting resistors R22-R27 and clamping diodes D3-D6 have been added andare functionally similarly to the same components shown in FIG. 3.

FIGS. 7 and 8 are simplified versions of FIG. 6 with only the clampingand currently limiting circuitry shown for clarity. As shown in FIG. 7,the A/C signal is provided by the line L1 to the relay RELAY 2 andconducted to the inputs IN1 and IN2 in which the sinusoidal signal isclamped by the diode pairs D5, D6 and D3, D4 respectively resulting inthe shown square wave of 0 to 5 V (see FIG. 8).

FIG. 8 shows the same sinusoidal signal conducted by line L2 into relayRELAY 3 to the inputs IN1 and IN2. The sinusoidal signal on line L2being 180° out of phase compared to the sinusoidal signal on line L1 fora two-phase sinusoidal source.

Table IV shows the operating states and expected results for the circuitshown in FIG. 6.

TABLE IV IN 1 IN 2 Digital Digital input input signal signal Relay Relay(load (DLB L1 input L2 input Load R2 R3 signal) signal) Comment Group AConnected Connected Connected open open Logic Logic Good control low lowand wiring Connected Connected Connected open closed 60 Hz 60 Hz Goodcontrol square square and wiring wave wave (in (in phase phase with withL2) L2) Connected Connected Connected closed open 60 Hz 60 Hz Goodcontrol square square and wiring wave wave (in (in phase phase with withL1) L1) Connected Connected Connected closed closed 60 Hz 60 Hz Goodcontrol square square and wiring wave wave (in (in phase phase with withL1) L2) Group B Disconnected Connected Connected open Open Logic Logiclow low Disconnected Connected Connected open closed 60 Hz 60 Hz squaresquare wave wave (in (in phase phase with with L2) L2) DisconnectedConnected Connected closed Open Logic Logic Error low low detected L1disconnect Disconnected Connected Connected closed closed 60 Hz 60 HzError square square detected wave wave L1 (in (in disconnect phase phasewith with L2) L2) Group C Connected Disconnected Connected open openLogic Logic low low Connected Disconnected Connected open closed LogicLogic Error low low detected L2 disconnect Connected DisconnectedConnected closed open 60 Hz 60 Hz square square wave wave (in (in phasephase with with L1) L1) Connected Disconnected Connected closed closed60 Hz 60 Hz Error square square detected wave wave L2 (in (in disconnectphase phase with with L1) L1) Group D Connected Connected Disconnectedopen open Logic Logic low low Connected Connected Disconnected openclosed Logic 60 Hz Error low square detected wave load (in disconnectphase with L2) Connected Connected Disconnected closed open 60 Hz LogicError square low detected wave load (in disconnect phase with L1)Connected Connected Disconnected closed closed 60 Hz 60 Hz square squarewave wave (in (in phase phase with with L1) L2) Group E ConnectedConnected Connected Closed Open 60 Hz 60 Hz Relay/control s/b squaresquare error open wave wave detected (in (in phase phase with with L1)L1) Connected Connected Connected Open Closed 60 Hz 60 Hz Relay/controls/b square square error open wave wave detected (in (in phase phase withwith L2) L2)

Group A shows the four conditions of a properly functioning load andwiring with no errors detected.

Group B shows the error detected when line L1 is disconnected. However,we are not sure whether it is a line L1 connection error or a relayRELAY 2 error. It is generally assumed that it is the line L1 connectionas the diagnostic circuit is periodically checked.

Group C shows the error detected when line L2 is disconnected. As statedabove, we are not sure whether it is the line L2 connection error or arelay RELAY 3 error. It is assumed to be a line L2 error.

Group D shows the error when the load LOAD is not properly connected.

Group E shows the case when relay RELAY 2 is stuck closed when it shouldbe open.

Group F shows the case when relay RELAY 3 is stuck closed when it shouldbe open.

FIGS. 9-11 illustrate variations on a fourth embodiment of thediagnostic circuit. FIG. 9 shows the use of an isolation capacitor C31for isolating the micro-controlled A/D device MICRO from the relay RELAY4 and the load LOAD. A further isolation capacitor C30 isolates D/Cground from A/C neutral N. As with the previous embodiments we havecurrent/voltage limiting resistors R30, R31, R32 for circuit protectionand clamping diodes D10, D11 for transforming the sinusoidal A/C signalat 120 V AC to a 5 V square wave having the same frequency. We havethree connecting terminals I, J and K for connecting to the applianceunder test and the micro-controlled A/D device MICRO has an input INwhere all the voltage readings are taken.

Table V shows the expected results for a properly operating load andrelay and further identifies various errors.

TABLE V L1 input Load Relay Result at input In Connected Connected OpenLogic low Connected Connected Closed 60 Hz square wave (in phase withL1) 3. Connected Connected Stuck closed, 60 Hz square wave - s/b openError detected (in phase with L1) 4. Disconnected - Connected Open Logiclow, error not Error detected 5. Disconnected - Connected Closed Logiclow, error Error detected 6. Connected Disconnected - Open Logic low,error is not Error detected 7. Connected Disconnected - Closed 60 Hzsquare wave Error Error is not detected

In rows 1 and 2 a properly functioning circuit is detected and no errorsare diagnosed. In row 3, it is detected that the relay RELAY 4 is stuckclosed because the square wave is detected. In row 4, line L1 isdisconnected but the error is not yet detected. In row 5, the error inline L1 is detected because no square wave is detected after the relayRELAY 4 is closed. In rows 6 and 7 the load LOAD 4 is disconnected butis not detected. In essence line L1 errors are detectable but the loaderror is not with this circuit.

FIG. 10 shows an alternative version of the isolation type diagnostictest circuit. A relay RELAY 5 is connected between the line L1 and theload LOAD. A first isolation capacitor C35 isolates the 5 V source fromthe line L1. A second isolation capacitor C36 isolates themicro-controlled A/D device MICRO from the relay RELAY 5 and the loadLOAD. As with the previous embodiments we having current/voltagelimiting resistors R35, R36 for circuit protection and clamping diodesD12, D13 for transforming the sinusoidal A/C signal to a 5 V square wavehaving the same frequency. We have two connecting terminals L and M forconnecting to the appliance under test. The micro-controlled A/D deviceMICRO has the input IN where all the voltage readings are taken.

Table VI shows the expected results for a properly operating load andrelay and further identifies various errors.

TABLE VI L1 input Load 5 Relay 5 Result at input IN 1. ConnectedConnected Open 60 Hz square wave (180° out of phase with L1) 2.Connected Connected Closed Initial pulse high then logic low 3.Connected Connected Stuck closed, Logic low - Error is s/b open detected4. Disconnected - Connected Open 60 Hz square wave Error (180° out ofphase with L1) 5. Disconnected - Connected Closed 60 Hz square waveError (180° out of phase with L1) - Error is detected 6. ConnectedDisconnected - Open Logic low - Error is Error detected 7. ConnectedDisconnected - Closed Pulse high then logic Error low

Rows 1 and 2 show the expected results being dependent on the AC signalinput from line L1 or neutral N being 180° out of phase from line L1. Inrow 3 the relay RELAY 5 is diagnosed as stuck open because only a logiclow is detected. In row 4, no error is detected but this error isdetected in row 5 when the square wave is sensed. In row 6, the error inload LOAD 5 is detected when no square wave is sensed. In row 7, theerror is not detected.

FIG. 11 shows a capacitively isolated diagnostic test circuit for athree phase, 240 V A/C signal. Terminals N, P, Q and R supply connectionpoints to the unit under test for connecting lines L1, L2 to relaysRELAY 6 and RELAY 7 respectively and to the load LOAD. Isolationcapacitors C40, C41, and C42 isolate the lines L1, L2 and neutral N fromthe rest of the circuit. Current protection resistors R40-R45 areprovided as are the clamping diode sets D20, D21 and D22, D23 forprotecting the micro-controlled A/D device MICRO from harmful high-levelcurrents and voltages. FIG. 11 further shows a reference clock driven byline L1.

Table VII shows the expected results for a properly operating load andrelay and further identifies various errors.

TABLE VII Relays Result at Result at L1 input L2 input Load 6-7 IN 1 IN2 Connected Connected Connected Both Logic Logic low open low 2.Connected Connected Connected L1 60 Hz 60 Hz relay 6 square squareclosed wave wave (in (in phase phase with L1) with L1) 3. ConnectedConnected Connected L2 60 Hz 60 Hz relay 7 square square closed wavewave (in (in phase phase with L2) with L2) 4. Connected ConnectedConnected Both 60 Hz 60 Hz relays square square closed wave wave (in (inphase phase with L2) with L1) 5. Dis- Connected Connected Both LogicLogic low connected open low 6. Dis- Connected Connected L1 Logic Logiclow connected relay 6 low Error Error closed detected detected 7.Connected Dis- Connected Both Logic Logic low connected open low 8.Connected Dis- Connected L2 Logic Logic low connected relay 7 low ErrorError closed detected detected 9. Connected Connected Dis- Both LogicLogic low connected open low 10. Connected Connected Dis- L1 60 Hz Logiclow connected relay 6 square Error closed wave detected (in phase withL1) 11. Connected Connected Dis- L2 Logic 60 Hz connected relay 7 lowError square closed detected wave (in phase with L2)

Rows 1-4 show the various connection configurations for a properlyoperating load and relays and the expected results at the inputs IN 1and IN 2. Row 5 is the case where the line L1 is disconnected but thiserror is not detected until the configuration of row 6 is set up and asquare wave is expected but only a logic low signal is detected. Row 7is the case where the line L2 is disconnected but this error is notdetected until the circuit configuration of row 8 is set up and a squarewave is expected but only a logic low signal is detected. Row 9 is thecase where the load LOAD is disconnected but the disconnection is notdiagnosed until the circuit conditions of either row 10 or 11 areperformed and logic low conditions are detected at one of the inputs.

We claim:
 1. A diagnostic circuit for connecting to a unit under testhaving at least two loads, the diagnostic circuit comprising: terminalsincluding a first terminal for connecting to a first load and a secondterminal for connecting to a second load a voltage sensing device havingan input for sensing a signal and coupled to said terminals; a D/Csource and ground; a first resistor having a first end connected to saidD/C source and a second end connected to said first terminal; and asecond resistor having a first end connected to said D/C source and asecond end connected to said second terminal.
 2. The diagnostic circuitaccording to claim 1, further comprising a resistor connected betweeneach of said terminals and said input.
 3. A diagnostic circuit forconnecting to a unit under test having a load and a sinusoidal source,the diagnostic circuit comprising: a voltage sensing device having aninput for sensing a signal; terminals including first terminals forconnecting to the load and a second terminal for connecting to thesinusoidal source; a relay connected between one of said first terminalsand said second terminal for connecting the sinusoidal source to theload; a D/C voltage source and ground; clamping diodes including a firstclamping diode connected between said D/C voltage source and said inputand a second clamping diode connected between said ground and saidinput; a first capacitor connected between said ground and a first oneof said first terminals; and a second capacitor connected between saidclamping diodes and a second one of said first terminals.
 4. Thediagnostic circuit according to claim 3, further comprising at least oneresistor connected between said input and one of said first and secondcapacitors.
 5. A diagnostic circuit for connecting to a unit under testhaving a load and a sinusoidal source, the diagnostic circuitcomprising: a voltage sensing device having a first input for sensing asignal and a second input; terminals including a first terminal forconnecting to the load and a second terminal for connecting to thesinusoidal source; a relay connected between said first terminal andsaid second terminal for connecting the sinusoidal source to the load; aD/C voltage source and ground; clamping diodes including a firstclamping diode connected between said D/C voltage source and said inputand a second clamping diode connected between said ground and saidinput; a first capacitor connected between said first terminal and saidfirst input; and a second capacitor connected between said secondterminal and said second input.
 6. The diagnostic circuit according toclaim 5, further comprising at least one resistor connected between saidfirst input and said first capacitor.
 7. A diagnostic circuit forconnecting to a unit under test having a load and three lines of asinusoidal source, the diagnostic circuit comprising: a voltage sensingdevice having a first input and a second input; terminals includingfirst terminals for connecting to the load and second terminals forconnecting to two lines of the sinusoidal source; relays each connectedbetween one of said second terminals and one of said first terminals forconnecting the sinusoidal source to the load; a D/C voltage source andground; a first diode pair having a first clamping diode connectedbetween said D/C voltage source and said first input and a secondclamping diode connected between said ground and said first input; asecond diode pair having a first clamping diode connected between saidD/C voltage source and said second input and a second clamping diodeconnected between said ground and said second input; a first capacitorconnected between a first of said first terminals and said first input;and a second capacitor connected between a second of said firstterminals and said second input.
 8. The diagnostic circuit according toclaim 7, further comprising a third capacitor connected between a thirdline of the sinusoidal source and said ground.
 9. The diagnostic circuitaccording to claim 7, further comprising at least one resistor connectedbetween said first input and said first capacitor.
 10. The diagnosticcircuit according to claim 7, further comprising at least one resistorconnected between said second input and said second capacitor.